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Sreeshilpa P. Mohanan

Email ID:  
Date of Joining:  
Nature of Association:  


Qualification:

  • M.TECH: VLSI AND EMBEDDED SYSTEMSB
  • B.TECH: ELECTRONICS AND COMMUNICATION ENGINEERING
  • MINOR IN CHEMICAL ENGINEERING

Experience:

  • Teaching Experience – Nil
  • Research Experience-Nil


Recognitions & Achievements:

  • Tech First Rank Holder with CGPA 9.31

First prize

  • Ideathon conducted by IEDC(2021)

Third prize

  • Ideathon conducted by code@saintgits(2021)
  • National Level Idea Presentation Competition conducted at MBC College of Engineering and Technology (2022-2023)

Certifications:

  • AICTE Training And Learning (ATAL) Academy Faculty Development Program on -AI in Power Converters for Sustainable Energy Systems (6 days offline -2026)
  • Internship on UAVs- AI Aerial Dynamics ,Kochi
  • Workshop on PCB Designing – TKM College of Engineering, Kollam (2020)
  • Workshop on Soldering practice and LED bulb making at Saintgits College of Engineering
  • Internship on IoT – Nest Cyber Campus, Kochi
  • NPTEL: Sensors and Actuators – IISc Banglore(12 weeks-2025)
  • NPTEL: Innovation by Design – IIT Bombay (2021)
  • RS & GIS Applications – IIRS (ISRO)(2020)
  • Coursera-Programming Fundamentals, Duke University(2020)

Major conferences and FDP organized:

  • cOcOn International Cyber Security Conference 2025- coordinated and participated

Projects Done:

  • Low-Power FinFET-Based SRAM Cell Featuring Enhanced Stability Highly stable, low-power, and fast SRAM cell using 18 nm FinFET technology(Final year M.Tech project)
  • Performance Analysis of FinFET based 8T SRAM Cell using 18nm under Supply Voltage and Temperature Variations 8T SRAM cell performance analyzed under different supply voltages (VDD) and different temperatures using 18nm technology node
  • FinFET-Based SRAM Cell Topologies for Low-Power VLSI at 18-nm Technology Comparative analysis of 6T,8T, 10T, and 12T FinFET-based Static Random-Access Memory cells in 18nm technology using Cadence Virtuoso and Spectre
  • Vehicle Collision Avoidance with Vital Health Monitoring An embedded system project aimed at preventing vehicle collisions while monitoring key health parameters of the driver
  • Pulse Oximeter A project developed to calculate blood oxygen level and heart rate using embedded system techniques
  • FPGA-Based Traffic Controller A programmable logic-based system designed to efficiently manage and control traffic flow using FPGA technology
  • 6T SRAM Cell Evaluation of FinFET-Based vs. CMOS-Based 6T SRAM Cells Across Scaled Technology Nodes

Research Publications-Conference /Journal details:

  • Sreeshilpa P Mohanan et al.,”FinFET-Based SRAM Cell Topologies for Low-Power VLSI at 18-nm Technology”, VSPICE 2026 , Fifth International Conference on “VLSI, Signal Processing, Power Electronics, IoT, Communication and Embedded Systems (VSPICE-2026)” as a part of Multi-Conference on International Conference on Emerging Trends in Engineering (ICETE 2026) on 05 to 07, February 2026. (AIP Proceedings-Scopus Indexed)-Paper presented
  • Sreeshilpa. P. Mohanan, Sreekala K. S., and Ajith Ravindran, “Performance Analysis of FinFET based 8T SRAM Cell using 18nm under Supply Voltage and Temperature Variations,” in Proceedings of International Conference on Smart Communication and Sustainable Technologies, Kerala, India, June 18–20, 2026 (IEEE) .Paper Presented.
  • Sreeshilpa P Mohanan et al., “Vehicle Collision Avoidance with Vital Health Monitoring”, International Journal of Novel Research and Development, Vol. 8, Issue 06, 2023

Academic Positions handled & Extension activities:

  • Placement Coordinator